http://groups.google.com/group/beagleboard/browse_thread/thread/4a237f8e1130e608 ==results 7za b compressing===
720MHz DDR2 266 = 211 950MHz DDR2 266 = 278 950MHz DDR2 300 = 281 980MHz = failsetting DDR freq doesn't seem affect. == read cpu freq scaling== http://processors.wiki.ti.com/index.php/AM335x_Power_Management_User_guide == c program == #guide: http://nixdev.com/?p=330 #github: https://github.com/c2h2/bclock At first i tried to overclock the MPU by manually set the MPU registers. The registers who controls the MPU-freqency is CM_DIV_M2_DPLL_MPU and CM_CLKSEL_DPLL_MPU. The ADPLLS calculates the MPU clock by following formula: CLKINP * [1 / (N+1)] * [M] * [1/M2] CLKINP is the source input-clock, 24. N is the divider in CM_CLKSEL_DPLL_MPU M is the multiplier in CM_CLKSEL_DPLL_MPU M2 is the divider in CM_DIV_M2_DPLL_MPU